Based on the authors' expansive collection of notes taken over the years, Nano-CMOS Circuit and Physical Design bridges the gap between physical and circuit design and fabrication processing, manufacturability, and yield. This innovative book covers: process technology, including sub-wavelength optical lithography; impact of process scaling on circuit and physical implementation and low power with leaky transistors; and DFM, yield, and the impact of physical implementation.

BAN P. WONG, IENG MIEE, served for five years as a member of the technical program committee of IEEE International Solid-State Circuits Conference and as session chair, cochair, and organizer of a panel session. He has three issued patents. He has led circuit design teams in developing methodology and implementation of high-performance and low-power microprocessors. He is currently Senior Engineering Manager for NVIDIA Corporation.

ANURAG MITTAL received his PhD in applied physics from Yale University. He has codeveloped novel embedded NVM microcontroller and microprocessor solutions including the world’s first truly CMOS-compatible Flash technology. He is Senior Staff Engineer for Virage Logic, Inc.

YU CAO received his PhD in electrical engineering from University of California, Berkeley. He is a postdoctoral researcher in the Berkeley Wireless Research Center. He received the 2000 Beatrice Winner Award at the IEEE International Solid-State Circuits Conference.

GREG STARR received his PhD in electrical engineering from Arizona State University. Currently, he is a Senior Design Manager at Xilinx Corporation.