{"product_id":"9780792392446","title":"High Level Synthesis of ASICs under Timing and Synchronization Constraints","description":"\u003ch1\u003eHigh Level Synthesis of ASICs under Timing and Synchronization Constraints\u003c\/h1\u003e \u003ch2\u003eKu, David C.; DeMicheli, Giovanni\u003c\/h2\u003e \u003cp\u003eComputer-aided synthesis of digital circuits from behavioral  level specifications offers an effective means to deal with increasing  complexity of digital hardware design. \u003cem\u003eHigh Level Synthesis of  ASICs\u003c\/em\u003e \u003cem\u003eUnder Timing and Synchronization Constraints\u003c\/em\u003e addresses  both theoretical and practical aspects in the design of a high-level  synthesis system that transforms a behavioral level description of  hardware to a synchronous logic-level implementation consisting of  logic gates and registers. \u003cbr\u003e  \u003cem\u003eHigh Level Synthesis of ASICs Under Timing and Synchronization\u003c\/em\u003e  \u003cem\u003eConstraints\u003c\/em\u003e addresses specific issues in applying high-level  synthesis techniques to the design of ASICs. This complements previous  results achieved in synthesis of general-purpose and signal  processors, where \u003cem\u003edata-path\u003c\/em\u003e design is of utmost importance. In  contrast, ASIC designs are often characterized by complex  \u003cem\u003econtrol\u003c\/em\u003e schemes, to support communication and synchronization  with the environment. The combined design of efficient data-path  control-unit is the major contribution of this book. \u003cbr\u003e  Three requirements are important in modeling ASIC designs:  \u003cem\u003econcurrency, external synchronization\u003c\/em\u003e, and \u003cem\u003edetailed timing\u003c\/em\u003e  \u003cem\u003econstraints.\u003c\/em\u003e The objective of the research work presented here  is to develop a hardware model incorporating these requirements as  well as synthesis algorithms that operate on this hardware model.  \u003cbr\u003e  The contributions of this book address both the theory and the  implementation of algorithm for hardware synthesis. \u003cbr\u003e\u003c\/p\u003e \u003ch3\u003eDetails\u003c\/h3\u003e \u003cp\u003ePublished by: Springer\u003c\/p\u003e \u003cp\u003ePublication Date: 1992-05-31\u003c\/p\u003e \u003cp\u003eFormat: Hardcover\u003c\/p\u003e \u003cp\u003eISBN-13: 9780792392446\u003c\/p\u003e \u003cp\u003eDOI: 10.1007\/978-1-4757-2117-1\u003c\/p\u003e \u003cp\u003eDimensions: 234.0cm x156.0cm\u003c\/p\u003e \u003cp\u003ePages: 294.0\u003c\/p\u003e ","brand":"Springer US","offers":[{"title":"Default Title","offer_id":45578392862860,"sku":"9780792392446","price":152.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0710\/9545\/1788\/files\/9780792392446.jpg?v=1767145576","url":"https:\/\/lateknightbooks.com\/products\/9780792392446","provider":"Late Knight Books and Services, LLC","version":"1.0","type":"link"}