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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test

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Frontiers in Electronic Testing

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

Process-Aware SRAM Design and Test

Andrei Pavlov | Manoj Sachdev

Technology & Engineering / Electronics / Circuits / General

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

Prof. Sachdev has authored several successful books with Springer

Publication Date: 21 June 2008
Publisher: Springer Netherlands
Imprint: Springer
ISBN-13: 9781402083624
Format: Hardback
Page Count: 194

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