A Guide to VHDL

Mazor, Stanley; Langstraat, Patricia

A Guide to VHDL is intended for the working engineer who needs to develop, document, simulate and synthesize a design using the VHDL language. It is for system and chip designers who are working with VHDL CAD tools, and who have some experience programming in Fortran, Pascal, or C and have used a logic simulator.
A Guide to VHDL includes a number of paper exercises and computer lab experiments. If a compiler/simulator is available to the reader, then the lab exercises invluded in the chapters can be run to reinforce the learning experience. For practical purposes, this book keeps simulator-specific text to a minimum, but does use the Synopsys VHDL Simulator command language in a few cases.
A Guide to VHDL can be used as a primer, since its contents are appropriate for an introductory course in VHDL.

Details

Published by: Springer

Publication Date: 2013-03-06

Format: Paperback

ISBN-13: 9781475721164

DOI: 10.1007/978-1-4757-2114-0

Dimensions: 254.0cm x178.0cm

Pages: 314.0