A bottom-up instructional guide to integrated circuit (IC) physical layout design

Physical layout design remains a critical yet underserved topic in IC education, where most textbooks emphasize circuit theory over the schematic-to-silicon transition. Fundamentals of Integrated Circuit Layout Design addresses this gap directly, walking readers through layout design using a bottom-up approach that progresses systematically from technology and device level through circuit level to complete chip level.

The text covers the standard CMOS microfabrication process flow and realization of non-transistor components including resistors, capacitors, inductors, and diodes. Analog and digital layout techniques are treated separately. Coverage extends to design verification tools such as design rule check, circuit extraction, and layout-vs.-schematic, plus foundry roles, multi-project wafer runs, and advanced MOS microfabrication technologies.

Readers will also find:

• Various techniques responding to needs and requirements in analog and digital integrated circuit design such as device orientation, merging, matching, accurate ratioing, as well as cell-based, array-based, and bit-slice design
• Practical layout design considerations that deal with issues arising from technological imperfections, as well as the non-idealities and secondary effects of circuit elements and structures including parasitics, crosstalk, noise, latch-up, and delay
• Provisions at the layout level for post-fabrication monitoring and intervention, including probe station testing of bare dies, test pad design, fusible links, and laser trimming of passive and active components
• Numerous analysis and design examples embedded throughout chapters that reinforce layout techniques with hands-on problem solving
• End-of-chapter exercises that allow comprehensive review of concepts and systematic practice of physical design principles covered in each section

Written for instructors of IC design courses, graduate students, and senior undergraduates, this book also serves researchers designing IC prototypes and practicing electrical engineers. Its structured, step-by-step pedagogy fills a distinct need in physical design education where layout-specific instructional texts are scarce.

Amir M. Sodagar, PhD, is an Associate Professor of Electrical and Biomedical Engineering in the EECS Department at Lassonde School of Engineering, York University, Toronto, Canada. He is the author of five books along with several book chapters and numerous journal articles and conference papers. He has served as a technical committee member for international conferences in bioelectronics and circuits and systems.