Principles of VLSI RTL Design: A Practical Guide

Churiwala, Sanjay; Garg, Sapan

Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are a function of the way the RTL was originally written.   Readers will benefit from a highly practical approach to the fundamentals of these topics, and will be given clear guidance regarding necessary safeguards to observe during RTL design.

Details

Published by: Springer

Publication Date: 2014-10-01

Format: Paperback

ISBN-13: 9781489995452

DOI: 10.1007/978-1-4419-9296-3

Dimensions: 235cm x155cm

Pages: 182